vdm sl - From implicit to explicit function definitions -
i have been creating specifications using implicit function definitions in vdm-sl , has worked out well. want prototype specification using explicit function definitions (no operations @ stage).
one way can see of doing create new module mimics functions defined in implicit specification, give them explicit definitions.
i'm sure done doubt ideal. there no link between implicit , explicit specification, though 1 refinement of other.
is there recommended way of transitioning implicit explicit function definitions. longer term want investigate doing formally, in first instance want implement implicit function specifications demonstrate specification in action.
there formal process refinement of specifications, though quite laborious, since there isn't tool support it.
if preserve implicit function type signatures , pre/postconditions, explicit versions "certain" refinement, assuming implementation correct inputs (which combinatorial testing can help). note can give implementation (body) function written in "implicit" style, may simplify things:
f(x:nat) r:nat == x + 1 -- line added implicit spec! pre x > 10 post r < 100
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